1. Cython compile system build. 2. License system build. 3. Auto md file generation for Sphinx build.

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2026-05-07 13:51:42 +08:00
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import nazca as nd
from .Foundry import Foundry
class AMF_Si220_Active(Foundry) :
## Generall parameters
STD_SMWG_WIDTH = 0.45
SLAB_GROWTH = 2
W_METAL_MIN = 5
SPACING_HEATER_MIN = 2
SPACING_METAL_MIN = 4
W_HEATER_MIN = 3
lib_path = 'GDS_lib\\'
# show_pins = False
def __init__(self, layermap={
'STRIP_COR' : ((10,0), 'RIB'),
'SRIB_COR' : ((11,0), 'GRAT'),
'RIB_COR' : ((12,0), 'SLAB'),
'SINWIN1' : ((53,0), 'SINWIN1'),
'SINWG1' : ((54,0), 'SINWG1'),
'HEATER' : ((115,0), 'HTR'),
'VIA_S2M' : ((100,0), 'VIA1'),
'VIA_H2M' : ((120,0), 'VIA2'),
'VIA_M2M' : ((120,0), 'VIA2'),
'METAL' : ((105,0), 'METAL'),
'METAL_2' : ((125,0), 'METAL_2'),
'PAD' : ((150,0), 'BONDPAD'),
'OPEN' : ((151,0), 'OX_OPEN'),
'ISL' : ((160,0), 'DT'),
### Active part
'PP' : ((21,0), 'PCONT'),
'PCONT' : ((21,0), 'PCONT'),
'NP' : ((22,0), 'NCONT'),
'NCONT' : ((22,0), 'NCONT'),
'PLD' : ((23,0), 'PIM'),
'NLD' : ((24,0), 'NIM'),
'PLD2' : ((25,0), 'IPD'),
'NLD2' : ((26,0), 'NPD'),
'GE' : ((40,0), 'GeEP'),
'PPPGE' : ((20,0), 'PPPGE'),
'NPPGE' : ((41,0), 'NPPGE'),
}):
super().__init__(layermap=layermap)
self._add_xsection_(xsection='strip',layers=['STRIP_COR'],growth=[0])
self._add_xsection_(xsection='rib',layers=['STRIP_COR','RIB_COR'],growth=[0,3]) ## Slab waveguide
self._add_xsection_(xsection='rib_s',layers=['STRIP_COR','SRIB_COR'],growth=[0,4]) ## Slab waveguide
self._add_xsection_(xsection='isl',layers=['ISL'],growth=[0])
self._add_xsection_(xsection='sn',layers=['SINWG1','SINWIN1'],growth=[0,21])
self._add_xsection_(xsection='pad',layers=['METAL_2','PAD'],growth=[0,-2.5]) ## DRC 4.2 - [AMF-QP-RND-006]