mxpic_forge/docs/source/primitives/edge_couplers/edge_couplers.md

Edge Coupler Reference

This section covers the dual-layer edge coupler designs used for fiber-to-chip interfacing.

Dual Layer PX3

The EC_dual_layer_px3 is our standard spot-size converter.

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:alt: GDS layout of the dual-layer edge coupler

Figure 1: GDS layout of the EC_dual_layer_px3 showing the SiN-to-SOI taper transition.

Design Notes

• Tapers: Ensure Ltp1, Ltp2, and Ltp3 provide enough length for adiabatic mode expansion.

• Alignment: The angle_tile parameter (default 8°) is critical for reducing back-reflections.